仅使用两个转换器形成胶连逻辑，一个8位微处理器和两个12位DAC实现256级QAM。

　　本设计提出一种有效方法，仅用两个反向器，也无需查表，实现QAM（正交幅度调制）映射和转换成两个余角值。

　　假设要使用微处理器和两个带并行输入的10位DAC，创建在两个余角符号中的256级QAM信号。因为将256级QAM信号分离成同相成分的16级ASK（幅变调制）信号和求积成分的16级ASK，对称的方法是可行的。完全对称电路实现16位ASK的映射和转换（图1）。两个换向器是转换所需的唯一胶连逻辑。电路各部分转换微处理器的四个输出位为一个10位双余角矢量，它直接提供给DAC（表1）。DAC输入的可能值平均分布。表1的第三列在可选电流到电压转换后，提供规格化DAC输出。

　　对256级QAM信号，需要8个输入位，精确符合大多数处理器上通用输入输出口的宽度。同时设定全部8位确保同相和积分信号之间同步。可以容易地为任何QAM模块和DAC分辨率改变电路。由于电路为全数字的，可以用反向放大器做输出缓冲器，并将其嵌入FPGA或CPLD。

　　英文原文：

　　Circuit provides low-cost QAM mapping and translation

　　Using just two inverters for glue logic, an 8-bit microcontroller and two 12-bit DACs enable 256-level QAM.

　　Pieter Demuytere, Cedric Mélange, Elena Matei, Els De Backer, Johan Bauwelinck, and Jan Vandewege, Ghent University, Department of Information Technology, Ghent, Belgium; Edited by Charles H Small and Fran Granville -- EDN, 9/27/2007

　　This Design Idea presents an efficient way to do QAM (quadrature-amplitude-modulation) mapping and translation into two’s-complement values with only two inverters and no look-up tables.

　　Suppose you want to create a 256-level QAM signal using a microcontroller and two 10-bit DACs with a parallel input in two’s-complement notation. Because you can split a 256-level QAM signal into a 16-level ASK (amplitude-shift-keying) signal for the in-phase component and a 16-level ASK for the quadrature component, a symmetrical approach is feasible. The fully symmetrically circuit performs the 16-level ASK mappings and translations (Figure 1). Two inverters are the only glue logic you need for the conversion. Each part of the circuit converts four output bits of the microcontroller into a 10-bit two’s-complement vector, which feeds directly to the DACs (Table 1). The possible DAC-input values are equally distributed. The third column of Table 1 gives the normalized DAC output after an optional current-to-voltage conversion.

　　For 256-level QAM signals, you need 8 input bits, which exactly fit the width o f a general-purpose-I/O bank on most microcontrollers. Simultaneously setting all 8 bits ensures synchronization between in-phase and quadrature signals. You can easily adapt this circuit for any QAM constellation or DAC resolution. Because this circuit is fully digital, you can also embed it in FPGAs or CPLDs, using the inverters available in the output buffers.