科通集团参加2012 Cadence用户大会-CDNLive，助力本土EDA设计水平提升
2012-07-31
EDA业内瞩目的年度活动Cadence用户大会CDNLive将于2012年8月9日于北京香格里拉酒店召开，主办方拟邀请400家客户参加大会，本土最大分销商科通集团作为Cadence中国区最大增值代理商，将以赞助商名义参加大会，演示代理的Cadence PCB全线(Allegro和OrCAD)产品，帮助本土工程师利用高级EDA软件加速产品设计。
科通集团自2011年1月1日起正式与Cadence公司开展分销合作，科通集团在中国区授权分销Cadence的OrCAD 及Allegro全线产品。科通现已拥有包括Microsoft、Intel、Panasonic、Freescale 、Xilinx、SanDisk、Linear及Broadcom等在内的多条产品线，在无线通信、电信设备、企业网络、数字媒体、家庭娱乐、汽车电子、工业控制等领域拥有很高的市场份额。深圳、香港、北京、上海、南京、武汉、西安、成都、厦门等多个分公司及办事处构成了覆盖全国的销售和服务网络，有超过500名高素质员工为国内的OEM厂商、ODM厂商和EMS厂商提供范围广泛的电子元器件销售及方案提供服务。
Cadence用户大会至今已经举办7届，每年的Cadence用户大会关注EDA领域的年度热点，以论文演讲、技术演示、趋势演讲、产品演示的方式全面展示EDA领域的最新技术和方案，大会也提供了交流的平台，方便与会者交流设计心得、解决设计难题。
2012年度Cadence用户大会将于2012年8月9日在北京香格里拉酒店举行。本次年会聚集了Cadence技术用户、开发商和业内专家。与会者将从业内同仁处了解应对未来电子设计挑战的新思路和解决方案。也可以通过论文演讲与其他地区的半导体设计者分享重要设计与验证问题的解决经验，并为实现高级晶片、SoC和系统发现新技术。
本次年度大会为免费活动，欢迎业内人士踊跃报名，在线注册地址：
http://www.cadence.com/cn/cadence/events/Pages/registration.aspx?eventid=106
如有任何疑问，请发送邮件至event_cn@cadence.com
会议日程安排：（2012年8月9日, 星期四）
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08:30-09:00 |
Registration and morning light breakfast |
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09:00-09:05 |
Opening Ceremony |
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James Liu, GM & VP sales, Cadence Design Systems |
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09:05-09:25 |
Keynote: Opportunities, Challenges, and Collaboration |
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Lip-Bu Tan, President and CEO, Cadence Design Systems |
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09:25-09:50 |
Keynote presentation |
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Dr. Wei Shaojun, Director, Institute of Microelectronics, Tsinghua University |
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09:50-10:15 |
Keynote: Realizing Best Performance, Power, Area, and Yield for the 2x Nanometer Era |
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Chi-Ping Hsu, Senior VP R&D, Cadence Design Systems |
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10:15-10:30 |
Morning Break |
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(Demo booth & Exhibition open) |
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10:30-11:55 |
Panel discussion (Theme: Aggregate or Disaggregate? Chinese semiconductor industry trend in the next 10 years) |
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Moderator: Charlie Huang, Senior VP, Worldwide Field Operations, Cadence Design Systems; 6 key executive panelists from China IC Ecosystem |
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11:55-12:00 |
Best Paper Award Ceremony |
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12:00-13:00 |
Lunch |
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(Demo booth open during 12:30-13:00) |
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Digital |
Custom/Analog |
System Design & Functional Verification |
IC Packaging and PCB Design |
Design & Verification IP |
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13:00-13:30 |
D-01 Encounter RTL-to-Signoff technology overview and roadmap --Cadence |
C-01 Custom Design And Simulation (CAS) Technology Overview --Cadence |
S-01 Functional Verification Overview --Cadence |
P-01 PCB and IC Packaging Technology Overview including Introduction of Sigrity Technology --Cadence |
I-01 Design & Verification IP technology overview --Cadence |
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13:30-14:00 |
D-02 Cadence Silicon Signoff and Verification Solutions Update--Cadence |
C-02 PVS: design and signoff with confidence--Cadence |
S-02 Next generation SoC co-development with Cadence’s System Development Suite--Cadence |
I-02 Reducing IC size, power and cost through early chip planning --Cadence |
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14:00-14:25 |
D-03 Customer Presentation --ARM |
C-03 Block and Chip level AMS Designer verification --NationalZ |
S-03 A comprehensive approach to scalable Framework for both vertical and horizontal reuse in UVM verification --AMD |
P-02 A new Methodology of Power Design and Analysis with Allegro PCB PDN --Ericsson |
I-03 customer presentation --ZTE |
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14:25-14:50 |
D-04 The implementation of Smartphone chip including Cortex TM-A5 core at Cadence Platform --Spreadtrum |
C-04 Using RelXpert to do performance degradation and lifetime simulation on mos device --Analogix |
S-04 Best Practice of Wreal Based Analog Modeling --LSI |
P-03 Building a PCB design quality assurance system —Huawei |
I-04 Customer presentation --Brite Semi |
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科通集团是中国本土最大、成长最快、关注增值服务的电子元器件及方案提供商，与全球主要的领先半导体供应商紧密合作，例如Broadcom、Xilinx、Freescale、Linear、Atmel、Intel、Microsoft、Sandisk等等，致力于为国内的OEM厂商、ODM厂商和EMS厂商提供范围广泛的电子元器件和技术支持服务,应用涉及智能手机、消费电子、工控医疗、汽车及智能交通系统、网络通信等众多领域。欢迎联络科通集团各地办事处，总部电话：0755-26743210，如需了解更多信息，请访问科通集团网站：www.comtech.com.cn，或关注科通官方微博：@comtech科通.