中图分类号：TN432文献标识码：ADOI:10.19339/j.issn.1674-2583.2026.04.006 中文引用格式：熊辉，马令坤，张杰，等. 一种适用于DCDC变换器的导通电阻电流采样电路设计［J］.集成电路应用，2026，43（4）：33-38. 英文引用格式：Xiong Hui,Ma Lingkun,Zhang Jie,et al. Design of an on-resistance current sensing circuit for DC-DC converters［J］.Application of IC，2026，43（4）：33-38.
Design of an on-resistance current sensing circuit for DC-DC converters
School of Electronic Information and Artificial Intelligence, Shaanxi University of Science and Technology
Abstract： To address the issues of large temperature drift, poor process compatibility, and complex circuit structure in conventional current sensing schemes for peak current-mode controlled DC-DC converters, a fully MOSFET-drain-source on-resistance RDS(on) current sensing circuit is designed in CanSemi 0.18 μm CMOS process. The proposed circuit utilizes the proportional matching of on-resistances between the power transistor and the sense transistor to realize current sensing, where the sensing ratio depends only on their width-to-length ratio and is substantially independent of input voltage, temperature, and process corner variations. Furthermore, an adaptive current compensation structure is introduced to effectively mitigate the impact of bias current on small-signal sensing accuracy. Simulation results demonstrate that the sensing accuracy reaches a minimum of 98.3% over a temperature range of -40 ℃ to 130 ℃. Under five process corners (TT, FF, SS, SNFP, FNSP) and an input voltage range of 2.9 V to 5 V, the sensing error remains below 5%. The circuit occupies a compact layout area of only 49 μm × 45 μm, featuring a simplified structure, ease of integration, good robustness, and significant engineering practical value.
Key words : DC-DC converter; current sensing; CMOS process; drain-source on-resistance; current compensation
传统电流采样方法包括电阻采样、MOS管镜像采样和电感直流电阻(Direct Current Resistance，DCR)采样。电阻采样精度高但引入额外导通损耗［3］；镜像采样无损耗但受沟道长度调制和温漂影响［4］；电感DCR采样［5］需要外接RC网络，且DCR值小，信噪比低。基于功率管导通电阻RDS(ON)的采样方法［6］利用功率管自身的导通压降检测电流，无额外损耗，但在传统结构中采样比例易受“工艺-电压-温度”(Process Voltage Temperature，PVT)影响。
近年来，工业界和学术界对高精度电流采样进行了广泛研究。Huang等人［7］提出了一种适用于大电流CPU供电的沟槽MOS电流镜像采样方案，通过采样场效应管(Sensing Field Effect Transistor，Sense FET)直接镜像功率管电流，并采用专用电流检测放大器处理高共模电压，在-40 ℃~125 ℃全温区内实现了±97%的采样精度。该方案面向多相大电流场景，但需要多芯片封装和专用运放，成本较高。杨子航等人［8］基于0.5 μm BCD工艺提出大电流场景下的补偿型采样电路，通过增加电流释放管与放电支路提升大电流采样精度，0~7 A内精度始终大于99%，但该方案采用BCD工艺，兼容性与集成度有限。
