中图分类号：TN919 文献标志码：A DOI: 10.16157/j.issn.0258-7998.267772 中文引用格式： 于吉刚，董辉. 基于多片AD9680的同步系统设计与测试分析[J]. 电子技术应用，2026，52(9)：134-139. 英文引用格式： Yu Jigang，Dong Hui. Design and test analysis of a synchronization system based on multiple AD9680 devices[J]. Application of Electronic Technique，2026，52(9)：134-139.
Design and test analysis of a synchronization system based on multiple AD9680 devices
Yu Jigang，Dong Hui
The 58th Research Institute of China Electronics Technology Group Corporation
Abstract： To address the stringent requirements for high-precision, multi-channel, high-speed synchronous data acquisition in applications such as phased-array radar, distributed measurement, and high-frequency communications, this paper presents a multi-device synchronized acquisition system based on the AD9680 analog-to-digital converter and the HMC7043 clock synchronization chip. The system employs the LMK04828 as the master clock reference and utilizes three HMC7043 devices to achieve precise clock synchronization and signal distribution across twelve AD9680 ADCs. A dual-FPGA architecture is adopted, with each FPGA controlling 12 ADC channels, and high-speed data transmission is implemented via the JESD204B interface protocol. Experimental results under a 1 000 MHz sampling rate with various typical input signals demonstrate that the inter-channel phase skew remains within 3°, fully satisfying high-precision synchronization requirements. Furthermore, all dynamic performance metrics meet the design specifications, offering a reliable and practically valuable engineering solution for multi-channel, high-frequency synchronous signal acquisition.
Key words : multi-channel；synchronous signal acquisition；AD9680；HMC7043；LMK04828；dynamic performance metrics
